Proposal For Neuromorphic Hardware Using Spin Devices

Abstract

We present a design-scheme for ultra-low power neuromorphic hardware using emerging spin-devices. We propose device models for 'neuron', based on lateral spin valves and domain wall magnets that can operate at ultra-low terminal voltage of ~20 mV, resulting in small computation energy. Magnetic tunnel junctions are employed for interfacing the spin-neurons with charge-based devices like CMOS, for large-scale networks. Device-circuit co-simulation-framework is used for simulating such hybrid designs, in order to evaluate system-level performance. We present the design of different classes of neuromorphic architectures using the proposed scheme that can be suitable for different applications like, analog-data-sensing, data-conversion, cognitive-computing, associative memory, programmable-logic and analog and digital signal processing. We show that the spin-based neuromorphic designs can achieve 15X-300X lower computation energy for these applications; as compared to state of art CMOS designs.

References in corpus (3)

• Velocity of domain-wall motion induced by electrical current in a ferromagnetic semiconductor (Ga,Mn)As
• Spin-Based Neuron Model with Domain Wall Magnets as Synapse
• Ultra Low Energy Analog Image Processing Using Spin Neurons

Cited by in corpus (4)

• Spin Orbit Torque Based Electronic Neuron
• Multiplier-less Artificial Neurons Exploiting Error Resiliency for Energy-Efficient Neural Computing
• Hybrid Piezoelectric-Magnetic Neurons: A Proposal for Energy-Efficient Machine Learning
• Exploring Boolean and Non-Boolean Computing Applications of Spin Torque Devices