200 citations · 551 across the 24 of their papers we have counts for
24 papers
Approximate ADCs for In-Memory Computing
Arkapravo Ghosh, Hemkar Reddy Sadana, Mukut Debnath +5
In memory computing (IMC) architectures for deep learning (DL) accelerators leverage energy-efficient and highly parallel matrix vector multiplication (MVM) operations, implemented…
Adaptive Multi-bit SRAM Topology Based Analog PUF
Sudarshan Sharma, Dhruv Thapar, Nikhil Bhelave +1
Physically Unclonable Functions (PUFs) are lightweight cryptographic primitives for generating unique signatures from minuscule manufacturing variations. In this work, we present l…
Acoustic Scene Analysis using Analog Spiking Neural Network
Anand Kumar Mukhopadhyay, Naligala Moses Prabhakar, Divya Lakshmi Duggisetty +2
Sensor nodes in a wireless sensor network (WSN) for security surveillance applications should preferably be small, energy-efficient, and inexpensive with in-sensor computational ab…
Current Mode Neuron for the Memristor based synapse
Harshit Roy, Mrigank Sharad
Due to many limitations of Von Neumann architecture such as speed, memory bandwidth, efficiency of global interconnects and increase in the application of artificial neural network…
Mixer-First Receiver with wide-RF Range
Harshit Roy, Mrigank Sharad
In the Passive Mixer first receiver, four mosfet, and four baseband impedance can synthesize High-Q bandpass filter. This on-chip High-Q bandpass filter can replace bulky, expensiv…
Power efficient Spiking Neural Network Classifier based on memristive crossbar network for spike sorting application
Anand Kumar Mukhopadhyay, Indrajit Chakrabarti, Arindam Basu +1
In this paper authors have presented a power efficient scheme for implementing a spike sorting module. Spike sorting is an important application in the field of neural signal acqui…
Single Chip Self-Tunable N-Input N-Output PID Control System with Integrated Analog Front-end for Miniature Robotics
Anindya Shankar Bhandari, Arjun Chaudhuri, Mrigank Sharad
In this work, we explore the design of an integrated, low power single chip multi-channel Proportional-Integral-Derivative (PID) controller for emerging miniature robotics, that in…
Energy Efficient and High Performance Current-Mode Neural Network Circuit using Memristors and Digitally Assisted Analog CMOS Neurons
Aranya Goswamy, Sagar Kumashi, Vikash Sehwag +4
Emerging nano-scale programmable Resistive-RAM (RRAM) has been identified as a promising technology for implementing brain-inspired computing hardware. Several neural network archi…
Digital LDO with Time-Interleaved Comparators for Fast Response and Low Ripple
Sohail Ahasan, Saurav Maji, Kauhsik Roy +1
On-chip voltage regulation using distributed Digital Low Drop Out (LDO) voltage regulators has been identified as a promising technique for efficient power-management for emerging…
High Sensitivity Biosensor using Injection Locked Spin Torque Nano-Oscillators
Tathagata Srimani, Bibhas Manna, Anand Kumar Mukhopadhyay +2
With ever increasing research on magnetic nano systems it is shown to have great potential in the areas of magnetic storage, biosensing, magnetoresistive insulation etc. In the fie…
Hierarchical Temporal Memory Based on Spin-Neurons and Resistive Memory for Energy-Efficient Brain-Inspired Computing
Deliang Fan, Mrigank Sharad, Abhronil Sengupta +1
Hierarchical temporal memory (HTM) tries to mimic the computing in cerebral-neocortex. It identifies spatial and temporal patterns in the input for making inferences. This may requ…
Design and Synthesis of Ultra Low Energy Spin-Memristor Threshold Logic
Deliang Fan, Mrigank Sharad, Kaushik Roy
A threshold logic gate (TLG) performs weighted sum of multiple inputs and compares the sum with a threshold. We propose Spin-Memeristor Threshold Logic (SMTL) gates, which employ m…
Exploring Ultra Low-Power on-Chip Clocking Using Functionality Enhanced Spin-Torque Switches
Mrigank Sharad, Kaushik Roy
Emerging spin-torque (ST) phenomena may lead to ultra-low-voltage, high-speed nano-magnetic switches. Such current-based-switches can be attractive for designing low swing global-i…
Energy-Efficient and Robust Associative Computing with Electrically Coupled Dual Pillar Spin-Torque Oscillators
Mrigank Sharad, Deliang Fan, Karthik Yogendra +1
Dynamics of coupled spin-torque oscillators can be exploited for non-Boolean information processing. However, the feasibility of coupling large number of STOs with energy-efficienc…
Spin Neurons: A Possible Path to Energy-Efficient Neuromorphic Computers
Mrigank Sharad, D. Fan, Kaushik Roy
Recent years have witnessed growing interest in the field of brain-inspired computing based on neural-network architectures. In order to translate the related algorithmic models in…
Exploring Boolean and Non-Boolean Computing Applications of Spin Torque Devices
Kaushik Roy, Mrigank Sharad, Deliang Fan +1
In this paper we discuss the potential of emerging spintorque devices for computing applications. Recent proposals for spinbased computing schemes may be differentiated as all-spin…
Ultra-High Density, High-Performance and Energy-Efficient All Spin Logic
Mrigank Sharad, Karthik Yogendra, Arun Gaud +2
All Spin Logic gates employ multiple nano-magnets interacting through spin-torque using non-magnetic channels. Compactness, non-volatility and ultra-low voltage operation are some…
Ultra-low Energy, High-Performance Dynamic Resistive Threshold Logic
Mrigank Sharad, Deliang Fan, Kaushik Roy
We propose dynamic resistive threshold-logic (DRTL) design based on non-volatile resistive memory. A threshold logic gate (TLG) performs summation of multiple inputs multiplied by…
Ultra-low Energy, High Performance and Programmable Magnetic Threshold Logic
Mrigank Sharad, Deliang Fan, Kaushik Roy
We propose magnetic threshold-logic (MTL) design based on non-volatile spin-torque switches. A threshold logic gate (TLG) performs summation of multiple inputs multiplied by a fixe…
Spintronic Switches for Ultra Low Energy On-Chip and Inter-Chip Current-Mode Interconnects
Mrigank Sharad, Kaushik Roy
Energy-efficiency and design-complexity of high-speed on-chip and inter-chip data-interconnects has emerged as the major bottleneck for high-performance computing-systems. As a sol…
Ultra Low Power Associative Computing with Spin Neurons and Resistive Crossbar Memory
Mrigank Sharad, Deliang Fan, Kaushik Roy
Emerging resistive-crossbar memory (RCM) technology can be promising for computationally-expensive analog pattern-matching tasks. However, the use of CMOS analog-circuits with RCM…
Proposal For Neuromorphic Hardware Using Spin Devices
Mrigank Sharad, Charles Augustine, Georgios Panagopoulos +1
We present a design-scheme for ultra-low power neuromorphic hardware using emerging spin-devices. We propose device models for 'neuron', based on lateral spin valves and domain wal…
Ultra Low Energy Analog Image Processing Using Spin Neurons
Mrigank Sharad, Charles Augustine, Georgios Panagopoulos +1
In this work we present an ultra low energy, 'on-sensor' image processing architecture, based on cellular array of spin based neurons. The 'neuron' constitutes of a lateral spin va…
Spin-Based Neuron Model with Domain Wall Magnets as Synapse
Mrigank Sharad, Charles Augustine, Georgios Panagopoulos +1
We present artificial neural network design using spin devices that achieves ultra low voltage operation, low power consumption, high speed, and high integration density. We employ…