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20172026
most citedTowards Low-Latency Energy-Efficient Deep SNNs via Attention-Guided Compression

12 citations · 78 across the 49 of their papers we have counts for

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cs.ET2024

Delay Balancing with Clock-Follow-Data: Optimizing Area Delay Trade-offs for Robust Rapid Single Flux Quantum Circuits

Robert S. Aviles, Phalgun G K, Peter A. Beerel

This paper proposes an algorithm for synthesis of clock-follow-data designs that provides robustness against timing violations for RSFQ circuits while maintaining high performance…

cs.ET2024

An Efficient and Scalable Clocking Assignment Algorithm for Multi-Threaded Multi-Phase Single Flux Quantum Circuits

Robert S. Aviles, Xi Li, Lei Lu +2

A key distinguishing feature of single flux quantum (SFQ) circuits is that each logic gate is clocked. This feature forces the introduction of path-balancing flip-flops to ensure p…

cs.ET2024

A Joint Optimization of Buffer and Splitter Insertion for Phase-Skipping Adiabatic Quantum-Flux-Parametron Circuits

Robert S. Aviles, Peter A. Beerel

Adiabatic Quantum-Flux-Parametron (AQFP) logic is a promising emerging device technology with six orders of magnitude lower power than CMOS. However, AQFP is challenged by the fact…

cs.ET20191 cited

Metastability-Resilient Synchronization FIFO for SFQ Logic

Gourav Datta, Haolin Cong, Souvik Kundu +1

Digital single-flux quantum (SFQ) technology promises to meet the demands of ultra low power and high speed computing needed for future exascale supercomputing systems. The combina…

cs.ET2018

SpRRAM: A Predefined Sparsity Based Memristive Neuromorphic Circuit for Low Power Application

Arash Fayyazi, Souvik Kundu, Shahin Nazarian +2

In this paper, we propose an efficient predefined structured sparsity-based ex-situ training framework for a hybrid CMOS-memristive neuromorphic hardware for deep neural network to…