activity
20172023
most citedChip-Chat: Challenges and Opportunities in Conversational Hardware Design

203 citations · 998 across the 44 of their papers we have counts for

collaborators
Showing 2022Show all

10 papers · 1 filter

cs.PL2022★ 11 cited

Benchmarking Large Language Models for Automated Verilog RTL Code Generation

Shailja Thakur, Baleegh Ahmad, Zhenxing Fan +5

Automating hardware design could obviate a significant amount of human error from the engineering process and lead to fewer errors. Verilog is a popular hardware description langua…

cs.CR2022★ 22 cited

Don't CWEAT It: Toward CWE Analysis Techniques in Early Stages of Hardware Design

Baleegh Ahmad, Wei-Kai Liu, Luca Collini +9

To help prevent hardware security vulnerabilities from propagating to later design stages where fixes are costly, it is crucial to identify security concerns as early as possible,…

cs.CR2022★ 40 cited

Lost at C: A User Study on the Security Implications of Large Language Model Code Assistants

Gustavo Sandoval, Hammond Pearce, Teo Nys +3

Large Language Models (LLMs) such as OpenAI Codex are increasingly being used as AI-based coding assistants. Understanding the impact of these tools on developers' code is paramoun…

cs.CR2022★ 15 cited

High-Level Approaches to Hardware Security: A Tutorial

Hammond Pearce, Ramesh Karri, Benjamin Tan

Designers use third-party intellectual property (IP) cores and outsource various steps in the integrated circuit (IC) design and manufacturing flow. As a result, security vulnerabi…

cs.AR2022★ 19 cited

ALICE: An Automatic Design Flow for eFPGA Redaction

Chiara Muscari Tomajoli, Luca Collini, Jitendra Bhandari +6

Fabricating an integrated circuit is becoming unaffordable for many semiconductor design houses. Outsourcing the fabrication to a third-party foundry requires methods to protect th…

cs.CR2022★ 6 cited

Designing ML-Resilient Locking at Register-Transfer Level

Dominik Sisejkovic, Luca Collini, Benjamin Tan +3

Various logic-locking schemes have been proposed to protect hardware from intellectual property piracy and malicious design modifications. Since traditional locking techniques are…

cs.CR2022★ 25 cited

CoFHEE: A Co-processor for Fully Homomorphic Encryption Execution (Extended Version)

Mohammed Nabeel, Homer Gamil, Deepraj Soni +6

The migration of computation to the cloud has raised concerns regarding the security and privacy of sensitive data, as their need to be decrypted before processing, renders them su…

cs.CR2022★ 7 cited

Fuzzing+Hardware Performance Counters-Based Detection of Algorithm Subversion Attacks on Post-Quantum Signature Schemes

Animesh Basak Chowdhury, Anushree Mahapatra, Deepraj Soni +1

NIST is standardizing Post Quantum Cryptography (PQC) algorithms that are resilient to the computational capability of quantum computers. Past works show malicious subversion with…

cs.SE2022★ 13 cited

Pop Quiz! Can a Large Language Model Help With Reverse Engineering?

Hammond Pearce, Benjamin Tan, Prashanth Krishnamurthy +3

Large language models (such as OpenAI's Codex) have demonstrated impressive zero-shot multi-task capabilities in the software domain, including code explanation. In this work, we e…

cs.CR2022★ 1 cited

HOLL: Program Synthesis for Higher OrderLogic Locking

Gourav Takhar, Ramesh Karri, Christian Pilato +1

Logic locking "hides" the functionality of a digital circuit to protect it from counterfeiting, piracy, and malicious design modifications. The original design is transformed into…