12 citations · 14 across the 6 of their papers we have counts for
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cs.DC2018
Analysis of Dynamic Memory Bandwidth Regulation in Multi-core Real-Time Systems
Ankit Agrawal, Renato Mancuso, Rodolfo Pellizzoni +1
One of the primary sources of unpredictability in modern multi-core embedded systems is contention over shared memory resources, such as caches, interconnects, and DRAM. Despite si…
cs.CR2018
A Novel Side-Channel in Real-Time Schedulers
Chien-Ying Chen, Sibin Mohan, Rodolfo Pellizzoni +2
We demonstrate the presence of a novel scheduler side-channel in preemptive, fixed-priority real-time systems (RTS); examples of such systems can be found in automotive systems, av…