13 citations · 41 across the 30 of their papers we have counts for
3 papers · 1 filter
LATCH: LLM-Assisted Timing Closure Harness for Post-Route FPGA Optimisation
Shu Gu, Matthew Youngman, Yuqin Zhao +5
Post-route FPGA timing closure remains expert-dependent and computationally expensive. We present LATCH (LLM-Assisted Timing Closure Harness), a two-layer framework that separates…
AgenticSizing: A Large Language Model-based Multi-Agent Framework for Analog Circuit Sizing
Yijia Hao, Pratibha Verma, Dongxu Guo +4
Analog circuit sizing remains a challenging and time-consuming task due to the large design space, strong performance trade-offs, and increasing circuit complexity in scaled techno…
TrIM, Triangular Input Movement Systolic Array for Convolutional Neural Networks: Dataflow and Analytical Modelling
Cristian Sestito, Shady Agwa, Themis Prodromakis
In order to follow the ever-growing computational complexity and data intensity of state-of-the-art AI models, new computing paradigms are being proposed. These paradigms aim at ac…