52 citations · 529 across the 30 of their papers we have counts for
30 papers
STELLAR: Structure-guided LLM Assertion Retrieval and Generation for Formal Verification
Saeid Rajabi, Chengmo Yang, Satwik Patnaik
Formal Verification (FV) relies on high-quality SystemVerilog Assertions (SVAs), but the manual writing process is slow and error-prone. Existing LLM-based approaches either genera…
AttackGNN: Red-Teaming GNNs in Hardware Security Using Reinforcement Learning
Vasudev Gohil, Satwik Patnaik, Dileep Kalathil +1
Machine learning has shown great promise in addressing several critical hardware security problems. In particular, researchers have developed novel graph neural network (GNN)-based…
Securing Cloud FPGAs Against Power Side-Channel Attacks: A Case Study on Iterative AES
Nithyashankari Gummidipoondi Jayasankaran, Hao Guo, Satwik Patnaik +3
The various benefits of multi-tenanting, such as higher device utilization and increased profit margin, intrigue the cloud field-programmable gate array (FPGA) servers to include m…
PoisonedGNN: Backdoor Attack on Graph Neural Networks-based Hardware Security Systems
Lilas Alrahis, Satwik Patnaik, Muhammad Abdullah Hanif +2
Graph neural networks (GNNs) have shown great success in detecting intellectual property (IP) piracy and hardware Trojans (HTs). However, the machine learning community has demonst…
Reinforcement Learning for Hardware Security: Opportunities, Developments, and Challenges
Satwik Patnaik, Vasudev Gohil, Hao Guo +2
Reinforcement learning (RL) is a machine learning paradigm where an autonomous agent learns to make an optimal sequence of decisions by interacting with the underlying environment.…
ATTRITION: Attacking Static Hardware Trojan Detection Techniques Using Reinforcement Learning
Vasudev Gohil, Hao Guo, Satwik Patnaik +2
Stealthy hardware Trojans (HTs) inserted during the fabrication of integrated circuits can bypass the security of critical infrastructures. Although researchers have proposed many…
DETERRENT: Detecting Trojans using Reinforcement Learning
Vasudev Gohil, Satwik Patnaik, Hao Guo +3
Insertion of hardware Trojans (HTs) in integrated circuits is a pernicious threat. Since HTs are activated under rare trigger conditions, detecting them using random logic simulati…
Embracing Graph Neural Networks for Hardware Security (Invited Paper)
Lilas Alrahis, Satwik Patnaik, Muhammad Shafique +1
Graph neural networks (GNNs) have attracted increasing attention due to their superior performance in deep learning on graph-structured data. GNNs have succeeded across various dom…
MuxLink: Circumventing Learning-Resilient MUX-Locking Using Graph Neural Network-based Link Prediction
Lilas Alrahis, Satwik Patnaik, Muhammad Shafique +1
Logic locking has received considerable interest as a prominent technique for protecting the design intellectual property from untrusted entities, especially the foundry. Recently,…
UNTANGLE: Unlocking Routing and Logic Obfuscation Using Graph Neural Networks-based Link Prediction
Lilas Alrahis, Satwik Patnaik, Muhammad Abdullah Hanif +2
Logic locking aims to prevent intellectual property (IP) piracy and unauthorized overproduction of integrated circuits (ICs). However, initial logic locking techniques were vulnera…
GNNUnlock: Graph Neural Networks-based Oracle-less Unlocking Scheme for Provably Secure Logic Locking
Lilas Alrahis, Satwik Patnaik, Faiq Khalid +4
In this paper, we propose GNNUnlock, the first-of-its-kind oracle-less machine learning-based attack on provably secure logic locking that can identify any desired protection logic…
UNSAIL: Thwarting Oracle-Less Machine Learning Attacks on Logic Locking
Lilas Alrahis, Satwik Patnaik, Johann Knechtel +4
Logic locking aims to protect the intellectual property (IP) of integrated circuit (IC) designs throughout the globalized supply chain. The SAIL attack, based on tailored machine l…
2.5D Root of Trust: Secure System-Level Integration of Untrusted Chiplets
Mohammed Nabeel, Mohammed Ashraf, Satwik Patnaik +3
Dedicated, after acceptance and publication, in memory of the late Vassos Soteriou. For the first time, we leverage the 2.5D interposer technology to establish system-level securit…
Attacking Split Manufacturing from a Deep Learning Perspective
Haocheng Li, Satwik Patnaik, Abhrajit Sengupta +5
The notion of integrated circuit split manufacturing which delegates the front-end-of-line (FEOL) and back-end-of-line (BEOL) parts to different foundries, is to prevent overproduc…
Power Side-Channel Attacks in Negative Capacitance Transistor (NCFET)
Johann Knechtel, Satwik Patnaik, Mohammed Nabeel +5
Side-channel attacks have empowered bypassing of cryptographic components in circuits. Power side-channel (PSC) attacks have received particular traction, owing to their non-invasi…
Obfuscating the Interconnects: Low-Cost and Resilient Full-Chip Layout Camouflaging
Satwik Patnaik, Mohammed Ashraf, Ozgur Sinanoglu +1
Layout camouflaging can protect the intellectual property of modern circuits. Most prior art, however, incurs excessive layout overheads and necessitates customization of active-de…
A Modern Approach to IP Protection and Trojan Prevention: Split Manufacturing for 3D ICs and Obfuscation of Vertical Interconnects
Satwik Patnaik, Mohammed Ashraf, Ozgur Sinanoglu +1
Split manufacturing (SM) and layout camouflaging (LC) are two promising techniques to obscure integrated circuits (ICs) from malicious entities during and after manufacturing. Whil…
Toward Physically Unclonable Functions from Plasmonics-Enhanced Silicon Disc Resonators
Johann Knechtel, Jacek Gosciniak, Alabi Bojesomo +3
The omnipresent digitalization trend has enabled a number of related malicious activities, ranging from data theft to disruption of businesses, counterfeiting of devices, and ident…
3D Integration: Another Dimension Toward Hardware Security
Johann Knechtel, Satwik Patnaik, Ozgur Sinanoglu
We review threats and selected schemes concerning hardware security at design and manufacturing time as well as at runtime. We find that 3D integration can serve well to enhance th…
An Interposer-Based Root of Trust: Seize the Opportunity for Secure System-Level Integration of Untrusted Chiplets
Mohammed Nabeel, Mohammed Ashraf, Satwik Patnaik +3
Leveraging 2.5D interposer technology, we advocate the integration of untrusted commodity components/chiplets with physically separate, entrusted logic components. Such organizatio…
Spin-Orbit Torque Devices for Hardware Security: From Deterministic to Probabilistic Regime
Satwik Patnaik, Nikhil Rangarajan, Johann Knechtel +2
Protecting intellectual property (IP) has become a serious challenge for chip designers. Most countermeasures are tailored for CMOS integration and tend to incur excessive overhead…
Protect Your Chip Design Intellectual Property: An Overview
Johann Knechtel, Satwik Patnaik, Ozgur Sinanoglu
The increasing cost of integrated circuit (IC) fabrication has driven most companies to "go fabless" over time. The corresponding outsourcing trend gave rise to various attack vect…
SMART: Secure Magnetoelectric AntifeRromagnet-Based Tamper-Proof Non-Volatile Memory
Nikhil Rangarajan, Satwik Patnaik, Johann Knechtel +2
The storage industry is moving toward emerging non-volatile memories (NVMs), including the spin-transfer torque magnetoresistive random-access memory (STT-MRAM) and the phase-chang…
Best of Both Worlds: Integration of Split Manufacturing and Camouflaging into a Security-Driven CAD Flow for 3D ICs
Satwik Patnaik, Mohammed Ashraf, Ozgur Sinanoglu +1
With the globalization of manufacturing and supply chains, ensuring the security and trustworthiness of ICs has become an urgent challenge. Split manufacturing (SM) and layout camo…