20 citations · 82 across the 14 of their papers we have counts for
5 papers · 1 filter
Sparq: A Custom RISC-V Vector Processor for Efficient Sub-Byte Quantized Inference
Théo Dupuis, Yoan Fournier, MohammadHossein AskariHemmat +4
Convolutional Neural Networks (CNNs) are used in a wide range of applications, with full-precision CNNs achieving high accuracy at the expense of portability. Recent progress in qu…
Statistical Hardware Design With Multi-model Active Learning
Alireza Ghaffari, Masoud Asgharian, Yvon Savaria
With the rising complexity of numerous novel applications that serve our modern society comes the strong need to design efficient computing platforms. Designing efficient hardware…
Quark: An Integer RISC-V Vector Processor for Sub-Byte Quantized DNN Inference
MohammadHossein AskariHemmat, Theo Dupuis, Yoan Fournier +8
In this paper, we present Quark, an integer RISC-V vector processor specifically tailored for sub-byte DNN inference. Quark is implemented in GlobalFoundries' 22FDX FD-SOI technolo…
BARVINN: Arbitrary Precision DNN Accelerator Controlled by a RISC-V CPU
Mohammadhossein Askarihemmat, Sean Wagner, Olexa Bilaniuk +3
We present a DNN accelerator that allows inference at arbitrary precision with dedicated processing elements that are configurable at the bit level. Our DNN accelerator has 8 Proce…
Bridging the Gap: FPGAs as Programmable Switches
Thomas Luinaud, Thibaut Stimpfling, Jeferson Santiago da Silva +2
The emergence of P4, a domain specific language, coupled to PISA, a domain specific architecture, is revolutionizing the networking field. P4 allows to describe how packets are pro…