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20242026
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cs.AR2026

VClare: Resolving Imperfect Specifications in LLM-Based Verilog Generation

Zhuorui Zhao, Bing Li, Yu Li +2

Large language models (LLMs) have demonstrated promising capabilities in generating Verilog code from natural language specifications. However, human-written specifications often c…

cs.AR2025

VFocus: Better Verilog Generation from Large Language Model via Focused Reasoning

Zhuorui Zhao, Bing Li, Grace Li Zhang +1

Large Language Models (LLMs) have shown impressive potential in generating Verilog codes, but ensuring functional correctness remains a challenge. Existing approaches often rely on…

cs.AR2025

VRank: Enhancing Verilog Code Generation from Large Language Models via Self-Consistency

Zhuorui Zhao, Ruidi Qiu, Ing-Chao Lin +3

Large Language Models (LLMs) have demonstrated promising capabilities in generating Verilog code from module specifications. To improve the quality of such generated Verilog codes,…

cs.AR2024

EncodingNet: A Novel Encoding-based MAC Design for Efficient Neural Network Acceleration

Bo Liu, Grace Li Zhang, Xunzhao Yin +2

Deep neural networks (DNNs) have achieved great breakthroughs in many fields such as image classification and natural language processing. However, the execution of DNNs needs to c…

cs.AR2024

Classification-Based Automatic HDL Code Generation Using LLMs

Wenhao Sun, Bing Li, Grace Li Zhang +3

While large language models (LLMs) have demonstrated the ability to generate hardware description language (HDL) code for digital circuits, they still suffer from the hallucination…