7 citations · 8 across the 2 of their papers we have counts for
2 papers
cs.LO2024★ 7 cited
Physically Aware Synthesis Revisited: Guiding Technology Mapping with Primitive Logic Gate Placement
Hongyang Pan, Cunqing Lan, Yiting Liu +5
A typical VLSI design flow is divided into separated front-end logic synthesis and back-end physical design (PD) stages, which often require costly iterations between these stages…
cs.ET2016★ 1 cited
A Memristor Crossbar-Based Computation Scheme with High Precision
Junyi Li, Fulin Peng, Fan Yang +1
The memristor is promising to be the basic cell of next-generation computation systems. Compared to the traditional MOSFET device, the memristor is efficient over energy and area.…