39 citations · 167 across the 24 of their papers we have counts for
8 papers · 1 filter
Techniques for Efficiently Handling Power Surges in Fuel Cell Powered Data Centers: Modeling, Analysis, Results
Yang Li, Di Wang, Saugata Ghose +7
Fuel cells are a promising power source for future data centers, offering high energy efficiency, low greenhouse gas emissions, and high reliability. However, due to mechanical lim…
RowClone: Accelerating Data Movement and Initialization Using DRAM
Vivek Seshadri, Yoongu Kim, Chris Fallin +8
In existing systems, to perform any bulk data movement operation (copy or initialization), the data has to first be read into the on-chip processor, all the way into the L1 cache,…
Mosaic: An Application-Transparent Hardware-Software Cooperative Memory Manager for GPUs
Rachata Ausavarungnirun, Joshua Landgraf, Vance Miller +4
Modern GPUs face a trade-off on how the page size used for memory management affects address translation and demand paging. Support for multiple page sizes can help relax the page…
High-Performance and Energy-Effcient Memory Scheduler Design for Heterogeneous Systems
Rachata Ausavarungnirun, Gabriel H. Loh, Lavanya Subramanian +2
When multiple processor cores (CPUs) and a GPU integrated together on the same chip share the off-chip DRAM, requests from the GPU can heavily interfere with requests from the CPUs…
A Memory Controller with Row Buffer Locality Awareness for Hybrid Memory Systems
HanBin Yoon, Justin Meza, Rachata Ausavarungnirun +2
Non-volatile memory (NVM) is a class of promising scalable memory technologies that can potentially offer higher capacity than DRAM at the same cost point. Unfortunately, the acces…
Holistic Management of the GPGPU Memory Hierarchy to Manage Warp-level Latency Tolerance
Rachata Ausavarungnirun, Saugata Ghose, Onur Kayıran +4
In a modern GPU architecture, all threads within a warp execute the same instruction in lockstep. For a memory instruction, this can lead to memory divergence: the memory requests…
Techniques for Shared Resource Management in Systems with Throughput Processors
Rachata Ausavarungnirun
The continued growth of the computational capability of throughput processors has made throughput processors the platform of choice for a wide variety of high performance computing…
Enabling the Adoption of Processing-in-Memory: Challenges, Mechanisms, Future Research Directions
Saugata Ghose, Kevin Hsieh, Amirali Boroumand +2
Poor DRAM technology scaling over the course of many years has caused DRAM-based main memory to increasingly become a larger system bottleneck. A major reason for the bottleneck is…