activity
20162026
most citedIsadora: Automated Information Flow Property Generation for Hardware Designs

18 citations · 21 across the 8 of their papers we have counts for

collaborators

8 papers

cs.CR2026

SoK: You Find What You Seek: Rethinking Oracles, Guidance, and Input Generation in Hardware Fuzzing

G Abarajithan, Zhenghua Ma, Cristian Tirelli +4

Hardware fuzzing is an active area in security verification research, yet its industrial adoption remains in its early stages. This SoK examines which lessons from software fuzzing…

cs.CR2026

CHARGE: Leveraging CWE Hierarchies for Hardware Security SystemVerilog Assertion Generation

Xiao Tan, Cynthia Sturton

This paper presents CHARGE, an automated framework for generating security properties for unverified RTL modules using CWEs and large language models (LLMs). The hallmark is a reas…

cs.AR2025

HeatSense: Intelligent Thermal Anomaly Detection for Securing NoC-Enabled MPSoCs

Mahdi Hasanzadeh, Kasem Khalil, Cynthia Sturton +1

Multi-Processor System-on-Chips (MPSoCs) are highly vulnerable to thermal attacks that manipulate dynamic thermal management systems. To counter this, we propose an adaptive real-t…

cs.CR2024★ 1 cited

Security Properties for Open-Source Hardware Designs

Jayden Rogers, Niyaz Shakeel, Divya Mankani +4

The hardware security community relies on databases of known vulnerabilities and open-source designs to develop formal verification methods for identifying hardware security flaws.…

cs.CR2023

Augmented Symbolic Execution for Information Flow in Hardware Designs

Kaki Ryan, Matthew Gregoire, Cynthia Sturton

We present SEIF, a methodology that combines static analysis with symbolic execution to verify and explicate information flow paths in a hardware design. SEIF begins with a statica…

cs.CR2023★ 1 cited

Countering the Path Explosion Problem in the Symbolic Execution of Hardware Designs

Kaki Ryan, Cynthia Sturton

Symbolic execution is a powerful verification tool for hardware designs, but suffers from the path explosion problem. We introduce a new approach, piecewise composition, which leve…

cs.CR2021★ 18 cited

Isadora: Automated Information Flow Property Generation for Hardware Designs

Calvin Deutschbein, Andres Meza, Francesco Restuccia +2

Isadora is a methodology for creating information flow specifications of hardware designs. The methodology combines information flow tracking and specification mining to produce a…

cs.CR2016★ 1 cited

Server-side verification of client behavior in cryptographic protocols

Andrew Chi, Robert Cochran, Marie Nesfield +2

Numerous exploits of client-server protocols and applications involve modifying clients to behave in ways that untampered clients would not, such as crafting malicious packets. In…