54 citations · 63 across the 3 of their papers we have counts for
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cs.CR2018
MI6: Secure Enclaves in a Speculative Out-of-Order Processor
Thomas Bourgeat, Ilia Lebedev, Andrew Wright +3
Recent attacks have broken process isolation by exploiting microarchitectural side channels that allow indirect access to shared microarchitectural state. Enclaves strengthen the p…
cs.AR2018
Constructing a Weak Memory Model
Sizhuo Zhang, Muralidaran Vijayaraghavan, Andrew Wright +2
Weak memory models are a consequence of the desire on part of architects to preserve all the uniprocessor optimizations while building a shared memory multiprocessor. The efforts t…