36 citations · 85 across the 7 of their papers we have counts for
Showing cs.ARShow all
2 papers · 1 filter
cs.AR2024
Instruction Scheduling in the Saturn Vector Unit
Jerry Zhao, Daniel Grubb, Miles Rusch +4
While the challenges and solutions for efficient execution of scalable vector ISAs on long-vector-length microarchitectures have been well established, not all of these solutions a…
cs.AR2016★ 15 cited
The Renewed Case for the Reduced Instruction Set Computer: Avoiding ISA Bloat with Macro-Op Fusion for RISC-V
Christopher Celio, Palmer Dabbelt, David A. Patterson +1
This report makes the case that a well-designed Reduced Instruction Set Computer (RISC) can match, and even exceed, the performance and code density of existing commercial Complex…