activity
20152018
most citedTiming Driven C-Slow Retiming on RTL for MultiCores on FPGAs

1 citations · 2 across the 5 of their papers we have counts for

collaborators
Showing 2016Show all

1 paper · 1 filter

cs.AR2016

A Novel RTL ATPG Model Based on Gate Inherent Faults (GIF-PO) of Complex Gates

Tobias Strauch

This paper starts with a comprehensive survey on RTL ATPG. It then proposes a novel RTL ATPG model based on "Gate Inherent Faults" (GIF). These GIF are extracted from each complex…