23 citations · 97 across the 18 of their papers we have counts for
18 papers
Tensor Memory Engine: On-the-fly Data Reorganization for Ideal Locality
Denis Hoornaert, Cole Strickler, Manos Athanassoulis +3
The shift to data-intensive processing from the cloud to the edge has introduced new challenges and expectations for the next generation of intelligent computing systems. As the me…
Per-Bank Memory Bandwidth Regulation for Predictable and Performant Real-Time System
Connor Rudy Sullivan, Amin Mamandipoor, Cole Ridge Strickler +1
Modern multicore system-on-chips (SoCs) share off-chip DRAM across cores, where bank-level interference can significantly degrade performance and threaten real-time guarantees. Whi…
Analysis and Mitigation of Shared Resource Contention on Heterogeneous Multicore: An Industrial Case Study
Michael Bechtel, Heechul Yun
In this paper, we present a solution to the industrial challenge put forth by ARM in 2022. We systematically analyze the effect of shared resource contention to an augmented realit…
Anytime-Lidar: Deadline-aware 3D Object Detection
Ahmet Soyyigit, Shuochao Yao, Heechul Yun
In this work, we present a novel scheduling framework enabling anytime perception for deep neural network (DNN) based 3D object detection pipelines. We focus on computationally exp…
DeepPicarMicro: Applying TinyML to Autonomous Cyber Physical Systems
Michael Bechtel, QiTao Weng, Heechul Yun
Running deep neural networks (DNNs) on tiny Micro-controller Units (MCUs) is challenging due to their limitations in computing, memory, and storage capacity. Fortunately, recent ad…
Memory-Aware Denial-of-Service Attacks on Shared Cache in Multicore Real-Time Systems
Michael Bechtel, Heechul Yun
In this paper, we identify that memory performance plays a crucial role in the feasibility and effectiveness for performing denial-of-service attacks on shared cache. Based on this…
SpectreRewind: Leaking Secrets to Past Instructions
Jacob Fustos, Michael Bechtel, Heechul Yun
Transient execution attacks utilize micro-architectural covert channels to leak secrets that should not have been accessible during logical program execution. Commonly used micro-a…
Virtual Gang based Scheduling of Real-Time Tasks on Multicore Platforms
Waqar Ali, Rodolfo Pellizzoni, Heechul Yun
We propose a virtual-gang based parallel real-time task scheduling approach for multicore platforms. Our approach is based on the notion of a virtual-gang, which is a group of para…
RT-Gang: Real-Time Gang Scheduling Framework for Safety-Critical Systems
Waqar Ali, Heechul Yun
In this paper, we present RT-Gang: a novel real-time gang scheduling framework that enforces a one-gang-at-a-time policy. We find that, in a multicore platform, co-scheduling multi…
Denial-of-Service Attacks on Shared Cache in Multicore: Analysis and Prevention
Michael G Bechtel, Heechul Yun
In this paper we investigate the feasibility of denial-of-service (DoS) attacks on shared caches in multicore platforms. With carefully engineered attacker tasks, we are able to ca…
Integrating NVIDIA Deep Learning Accelerator (NVDLA) with RISC-V SoC on FireSim
Farzad Farshchi, Qijing Huang, Heechul Yun
NVDLA is an open-source deep neural network (DNN) accelerator which has received a lot of attention by the community since its introduction by Nvidia. It is a full-featured hardwar…
Protecting real-time GPU kernels on integrated CPU-GPU SoC platforms
Waqar Ali, Heechul Yun
Integrated CPU-GPU architecture provides excellent acceleration capabilities for data parallel applications on embedded platforms while meeting the size, weight and power (SWaP) re…
DeepPicar: A Low-cost Deep Neural Network-based Autonomous Car
Michael G. Bechtel, Elise McEllhiney, Minje Kim +1
We present DeepPicar, a low-cost deep neural network based autonomous car platform. DeepPicar is a small scale replication of a real self-driving car called DAVE-2 by NVIDIA. DAVE-…
Deterministic Memory Abstraction and Supporting Multicore System Architecture
Farzad Farshchi, Prathap Kumar Valsan, Renato Mancuso +1
Poor time predictability of multicore processors has been a long-standing challenge in the real-time systems community. In this paper, we make a case that a fundamental problem tha…
Protecting Memory-Performance Critical Sections in Soft Real-Time Applications
Heechul Yun, Santosh Gondi, Siddhartha Biswas
Soft real-time applications such as multimedia applications often show bursty memory access patterns---regularly requiring a high memory bandwidth for a short duration of time. Suc…
Parallelism-Aware Memory Interference Delay Analysis for COTS Multicore Systems
Heechul Yun
In modern Commercial Off-The-Shelf (COTS) multicore systems, each core can generate many parallel memory requests at a time. The processing of these parallel requests in the DRAM c…
S3A: Secure System Simplex Architecture for Enhanced Security of Cyber-Physical Systems
Sibin Mohan, Stanley Bak, Emiliano Betti +3
Until recently, cyber-physical systems, especially those with safety-critical properties that manage critical infrastructure (e.g. power generation plants, water treatment faciliti…
Deterministic Real-time Thread Scheduling
Heechul Yun, Cheolgi Kim, Lui Sha
Race condition is a timing sensitive problem. A significant source of timing variation comes from nondeterministic hardware interactions such as cache misses. While data race detec…