8 citations · 9 across the 4 of their papers we have counts for
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cs.AR2019
System-level optimization of Network-on-Chips for heterogeneous 3D System-on-Chips
Jan Moritz Joseph, Dominik Ermel, Lennart Bamberg +2
For a system-level design of Networks-on-Chip for 3D heterogeneous System-on-Chip (SoC), the locations of components, routers and vertical links are determined from an application…
eess.SP2019
Simulation Environment for Link Energy Estimation in Networks-on-Chip with Virtual Channels
Jan Moritz Joseph, Lennart Bamberg, Imad Hajjar +3
Network-on-chip (NoC) is the most promising design paradigm for the interconnect architecture of a multiprocessor system-on-chip (MPSoC). On the downside, a NoC has a significant i…