activity
20142023
most citedAnyHLS: High-Level Synthesis with Partial Evaluation

30 citations · 72 across the 13 of their papers we have counts for

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Showing cs.ARShow all

6 papers · 1 filter

cs.AR2023★ 3 cited

To Spike or Not to Spike? A Quantitative Comparison of SNN and CNN FPGA Implementations

Patrick Plagwitz, Frank Hannig, Jürgen Teich +1

Convolutional Neural Networks (CNNs) are widely employed to solve various problems, e.g., image classification. Due to their compute- and data-intensive nature, CNN accelerators ha…

cs.AR2021

Proceedings of the DATE Friday Workshop on System-level Design Methods for Deep Learning on Heterogeneous Architectures (SLOHA 2021)

Frank Hannig, Paolo Meloni, Matteo Spallanzani +1

This volume contains the papers accepted at the first DATE Friday Workshop on System-level Design Methods for Deep Learning on Heterogeneous Architectures (SLOHA 2021), held virtua…

cs.AR2015

Proceedings of the Second International Workshop on FPGAs for Software Programmers (FSP 2015)

Frank Hannig, Dirk Koch, Daniel Ziener

This volume contains the papers accepted at the Second International Workshop on FPGAs for Software Programmers (FSP 2015), held in London, United Kingdom, September 1st, 2015. FSP…

cs.AR2015

Proceedings of the DATE Friday Workshop on Heterogeneous Architectures and Design Methods for Embedded Image Systems (HIS 2015)

Frank Hannig, Dietmar Fey, Anton Lokhmotov

This volume contains the papers accepted at the DATE Friday Workshop on Heterogeneous Architectures and Design Methods for Embedded Image Systems (HIS 2015), held in Grenoble, Fran…

cs.AR2014★ 1 cited

Proceedings of the First International Workshop on FPGAs for Software Programmers (FSP 2014)

Frank Hannig, Dirk Koch, Daniel Ziener

This volume contains the papers accepted at the First International Workshop on FPGAs for Software Programmers (FSP 2014), held in Munich, Germany, September 1st, 2014. FSP 2014 wa…

cs.AR2014★ 6 cited

Massively Parallel Processor Architectures for Resource-aware Computing

Vahid Lari, Alexandru Tanase, Frank Hannig +1

We present a class of massively parallel processor architectures called invasive tightly coupled processor arrays (TCPAs). The presented processor class is a highly parameterizable…