30 citations · 72 across the 13 of their papers we have counts for
14 papers
To Spike or Not to Spike? A Quantitative Comparison of SNN and CNN FPGA Implementations
Patrick Plagwitz, Frank Hannig, Jürgen Teich +1
Convolutional Neural Networks (CNNs) are widely employed to solve various problems, e.g., image classification. Due to their compute- and data-intensive nature, CNN accelerators ha…
Proceedings of the DATE Friday Workshop on System-level Design Methods for Deep Learning on Heterogeneous Architectures (SLOHA 2021)
Frank Hannig, Paolo Meloni, Matteo Spallanzani +1
This volume contains the papers accepted at the first DATE Friday Workshop on System-level Design Methods for Deep Learning on Heterogeneous Architectures (SLOHA 2021), held virtua…
Symbolic Loop Compilation for Tightly Coupled Processor Arrays
Michael Witterauf, Dominik Walter, Frank Hannig +1
Loop compilation for Tightly Coupled Processor Arrays (TCPAs), a class of massively parallel loop accelerators, entails solving NP-hard problems, yet depends on the loop bounds and…
HipaccVX: Wedding of OpenVX and DSL-based Code Generation
M. Akif Özkan, Burak Ok, Bo Qiao +2
Writing programs for heterogeneous platforms optimized for high performance is hard since this requires the code to be tuned at a low level with architecture-specific optimizations…
Utilizing Explainable AI for Quantization and Pruning of Deep Neural Networks
Muhammad Sabih, Frank Hannig, Juergen Teich
For many applications, utilizing DNNs (Deep Neural Networks) requires their implementation on a target architecture in an optimized manner concerning energy consumption, memory req…
AnyHLS: High-Level Synthesis with Partial Evaluation
M. Akif Özkan, Arsène Pérard-Gayot, Richard Membarth +5
FPGAs excel in low power and high throughput computations, but they are challenging to program. Traditionally, developers rely on hardware description languages like Verilog or VHD…
Proceedings of the Second International Workshop on FPGAs for Software Programmers (FSP 2015)
Frank Hannig, Dirk Koch, Daniel Ziener
This volume contains the papers accepted at the Second International Workshop on FPGAs for Software Programmers (FSP 2015), held in London, United Kingdom, September 1st, 2015. FSP…
Automatic Optimization of Hardware Accelerators for Image Processing
Oliver Reiche, Konrad Häublein, Marc Reichenbach +3
In the domain of image processing, often real-time constraints are required. In particular, in safety-critical applications, such as X-ray computed tomography in medical imaging or…
Proceedings of the DATE Friday Workshop on Heterogeneous Architectures and Design Methods for Embedded Image Systems (HIS 2015)
Frank Hannig, Dietmar Fey, Anton Lokhmotov
This volume contains the papers accepted at the DATE Friday Workshop on Heterogeneous Architectures and Design Methods for Embedded Image Systems (HIS 2015), held in Grenoble, Fran…
Code Generation for High-Level Synthesis of Multiresolution Applications on FPGAs
Moritz Schmid, Oliver Reiche, Christian Schmitt +2
Multiresolution Analysis (MRA) is a mathematical method that is based on working on a problem at different scales. One of its applications is medical imaging where processing at mu…
Proceedings of the First International Workshop on FPGAs for Software Programmers (FSP 2014)
Frank Hannig, Dirk Koch, Daniel Ziener
This volume contains the papers accepted at the First International Workshop on FPGAs for Software Programmers (FSP 2014), held in Munich, Germany, September 1st, 2014. FSP 2014 wa…
A Scala Prototype to Generate Multigrid Solver Implementations for Different Problems and Target Multi-Core Platforms
Harald Koestler, Christian Schmitt, Sebastian Kuckuk +3
Many problems in computational science and engineering involve partial differential equations and thus require the numerical solution of large, sparse (non)linear systems of equati…
Massively Parallel Processor Architectures for Resource-aware Computing
Vahid Lari, Alexandru Tanase, Frank Hannig +1
We present a class of massively parallel processor architectures called invasive tightly coupled processor arrays (TCPAs). The presented processor class is a highly parameterizable…
Proceedings of the First Workshop on Resource Awareness and Adaptivity in Multi-Core Computing (Racing 2014)
Frank Hannig, Jürgen Teich
This volume contains the papers accepted at the 1st Workshop on Resource Awareness and Adaptivity in Multi-Core Computing (Racing 2014), held in Paderborn, Germany, May 29-30, 2014…