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20152018
most citedSimultaneous Multi Layer Access: A High Bandwidth and Low Cost 3D-Stacked Memory Interface

21 citations · 21 across the 1 of their papers we have counts for

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cs.AR2018

SoftMC: Practical DRAM Characterization Using an FPGA-Based Infrastructure

Hasan Hassan, Nandita Vijaykumar, Samira Khan +6

This paper summarizes the SoftMC DRAM characterization infrastructure, which was published in HPCA 2017, and examines the work's significance and future potential. SoftMC (Soft Mem…

cs.AR2018

Flexible-Latency DRAM: Understanding and Exploiting Latency Variation in Modern DRAM Chips

Kevin K. Chang, Abhijith Kashyap, Hasan Hassan +7

This article summarizes key results of our work on experimental characterization and analysis of latency variation and latency-reliability trade-offs in modern DRAM chips, which wa…

cs.AR2018

Adaptive-Latency DRAM: Reducing DRAM Latency by Exploiting Timing Margins

Donghyuk Lee, Yoongu Kim, Gennady Pekhimenko +4

This paper summarizes the idea of Adaptive-Latency DRAM (AL-DRAM), which was published in HPCA 2015, and examines the work's significance and future potential. AL-DRAM is a mechani…

cs.AR2016

Adaptive-Latency DRAM (AL-DRAM)

Donghyuk Lee, Yoongu Kim, Gennady Pekhimenko +4

This paper summarizes the idea of Adaptive-Latency DRAM (AL-DRAM), which was published in HPCA 2015. The key goal of AL-DRAM is to exploit the extra margin that is built into the D…

cs.AR201521 cited

Simultaneous Multi Layer Access: A High Bandwidth and Low Cost 3D-Stacked Memory Interface

Donghyuk Lee, Gennady Pekhimenko, Samira Khan +2

Limited memory bandwidth is a critical bottleneck in modern systems. 3D-stacked DRAM enables higher bandwidth by leveraging wider Through-Silicon-Via (TSV) channels, but today's sy…