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hardware acceleration 1ISA extensions 1sparse tensor contraction 1transformer inference 1vector processors 1

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most citedTeraPool: A Physical Design Aware, 1024 RISC-V Cores Shared-L1-Memory Scaled-up Cluster Design with High Bandwidth Main Memory Link

2 citations · 2 across the 3 of their papers we have counts for

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cs.DC2026★ 2 cited

TeraPool: A Physical Design Aware, 1024 RISC-V Cores Shared-L1-Memory Scaled-up Cluster Design with High Bandwidth Main Memory Link

Yichao Zhang, Marco Bertuletti, Chi Zhang +5

Shared L1-memory clusters of streamlined instruction processors (processing elements - PEs) are commonly used as building blocks in modern, massively parallel computing architectur…