From the 1 of 4 linked papers with an AI index.
4 papers
At-the-Roofline Sparse Tensor Contractions on Vector Processors for Transformer Inference
Bowen Wang, Chi Zhang, Diyou Shen +3
The paper introduces Ventaglio, a hardware extension and ISA support for vector processors that efficiently executes sparse tensor contractions in Transformer inference, achieving…
Accelerating Precise End-to-End Simulation: Latency-Sensitive Many-core System Modeling
Yinrong Li, Zexin Fu, Yichao Zhang +5
Modern large language model workloads put increasing demands on parallel compute capability and on-chip memory capacity, while also stressing fine-grained data movement and synchro…
TeraPool: A Physical Design Aware, 1024 RISC-V Cores Shared-L1-Memory Scaled-up Cluster Design with High Bandwidth Main Memory Link
Yichao Zhang, Marco Bertuletti, Chi Zhang +5
Shared L1-memory clusters of streamlined instruction processors (processing elements - PEs) are commonly used as building blocks in modern, massively parallel computing architectur…
A Dynamic Allocation Scheme for Adaptive Shared-Memory Mapping on Kilo-core RV Clusters for Attention-Based Model Deployment
Bowen Wang, Marco Bertuletti, Yichao Zhang +2
Attention-based models demand flexible hardware to manage diverse kernels with varying arithmetic intensities and memory access patterns. Large clusters with shared L1 memory, a co…