Accelerating More Secure RC4 : Implementation of Seven FPGA Designs in Stages upto 8 byte per clock

Rourab Paul, Hemanta Dey, Amlan Chakrabarti +1

RC4 can be made more secured if an additional RC4-like Post-KSA Random Shuffing (PKRS) process is introduced between KSA and PRGA. It can also be made significantly faster if RC4 b…