22 citations · 47 across the 10 of their papers we have counts for
5 papers · 1 filter
Multi Core SSL/TLS Security Processor Architecture Prototype Design with automated Preferential Algorithm in FPGA
Rourab Paul, Amlan Chakrabarti, Ranjan Ghosh
In this paper a pipelined architecture of a high speed network security processor (NSP) for SSL,TLS protocol is implemented on a system on chip (SOC) where hardware information of…
Design space exploration for image processing architectures on FPGA targets
Chandrajit Pal, Avik Kotal, Asit Samanta +2
Due to the emergence of embedded applications in image and video processing, communication and cryptography, improvement of pictorial information for better human perception like d…
Fault Detection for RC4 Algorithm and its Implementation on FPGA Platform
Rourab Paul, Amlan Chakrabarti, Ranjan Ghosh
In hardware implementation of a cryptographic algorithm, one may achieve leakage of secret information by creating scopes to introduce controlled faulty bit(s) even though the algo…
Hardware Implementation of four byte per clock RC4 algorithm
Rourab Paul, Amlan Chakrabarti, Ranjan Ghosh
In the field of cryptography till date the 2-byte in 1-clock is the best known RC4 hardware design [1], while 1-byte in 1-clock [2], and the 1-byte in 3 clocks [3][4] are the best…
A simple 1-byte 1-clock RC4 design and its efficient implementation in FPGA coprocessor for secured ethernet communication
Rourab Paul, Sangeet Saha, Jkm Sadique Uz Zaman +3
In the field of cryptography till date the 1-byte in 1-clock is the best known RC4 hardware design [1], while the 1-byte in 3clocks is the best known implementation [2,3]. The desi…