6 citations · 8 across the 4 of their papers we have counts for
4 papers
A Novel Architecture of Area Efficient FFT Algorithm for FPGA Implementation
Atin Mukherjee, Amitabha Sinha, Debesh Choudhury
Fast Fourier transform (FFT) of large number of samples requires huge hardware resources of field programmable gate arrays (FPGA), which needs more area and power. In this paper, w…
A Novel Reconfigurable Architecture of a DSP Processor for Efficient Mapping of DSP Functions using Field Programmable DSP Arrays
Amitabha Sinha, Mitrava Sarkar, Soumojit Acharyya +1
Development of modern integrated circuit technologies makes it feasible to develop cheaper, faster and smaller special purpose signal processing function circuits. Digital Signal p…
Field Programmable DSP Arrays - A Novel Reconfigurable Architecture for Efficient Realization of Digital Signal Processing Functions
Amitabha Sinha, Soumojit Acharyya, Suranjan Chakraborty +1
Digital Signal Processing functions are widely used in real time high speed applications. Those functions are generally implemented either on ASICs with inflexibility, or on FPGAs…
Design Of A Reconfigurable DSP Processor With Bit Efficient Residue Number System
Chaitali Biswas Dutta, Partha Garai, Amitabha Sinha
Residue Number System (RNS), which originates from the Chinese Remainder Theorem, offers a promising future in VLSI because of its carry-free operations in addition, subtraction an…