14 papers
FinHardBench: Can LLMs Generate Latency-Aware Hardware for Financial Computing?
Weimin Fu, Hejia Zhang, Minghao Shao +6
Can large language models generate not just correct, but fast hardware? This paper investigates the question in financial FPGA design, where 5-10 nanoseconds of latency determines…
TrojanGYM: A Detector-in-the-Loop LLM for Adaptive RTL Hardware Trojan Insertion
Saideep Sreekumar, Zeng Wang, Akashdeep Saha +6
Hardware Trojans (HTs) remain a critical threat because learning-based detectors often overfit to narrow trigger/payload patterns and small, stylized benchmarks. We introduce Troja…
RAVEN: Retrieval-Augmented Vulnerability Exploration Network for Memory Corruption Analysis in User Code and Binary Programs
Parteek Jamwal, Minghao Shao, Boyuan Chen +15
Large Language Models (LLMs) have demonstrated remarkable capabilities across various cybersecurity tasks, including vulnerability classification, detection, and patching. However,…
Synthesis-in-the-Loop Evaluation of LLMs for RTL Generation: Quality, Reliability, and Failure Modes
Weimin Fu, Zeng Wang, Minghao Shao +5
RTL generation is more than code synthesis. Designs must be syntactically valid, synthesizable, correct, hardware-efficient. SOTA evaluations stop at functional correctness and do…
Focus Session: Hardware and Software Techniques for Accelerating Multimodal Foundation Models
Muhammad Shafique, Abdul Basit, Muhammad Abdullah Hanif +3
This work presents a multi-layered methodology for efficiently accelerating multimodal foundation models (MFMs). It combines hardware and software co-design of transformer blocks w…
Robustness Evaluation of Hybrid Quantum Neural Networks under Noise Models via System-Level Error Mitigation
Jesse Roberta Mingue Njiki, Nouhaila Innan, Alberto Marchisio +3
Quantum Neural Networks (QNNs) represent a promising direction within Quantum Machine Learning (QML), yet their realization on noisy intermediate-scale quantum (NISQ) devices remai…