collaborators

10 papers

cs.AR2026

FQTree: Fine-grained Quantization and Hardware Generation of Boosted Decision Trees

Zhiqiang Que, Chang Sun, Haiyang Wang +6

Boosted decision trees (BDTs) are widely used in latency-critical applications, but efficient hardware deployment remains challenging. Existing designs often rely on uniform or man…

hep-ex2026

Patch Hierarchical Attention Transformer for Efficient Particle Jet Tagging

Aaron Wang, Zihan Zhao, Alan Xia +5

Real-time jet tagging is critical for identifying short-lived particle decays in the high-throughput detectors of the Large Hadron Collider, where real-time trigger systems respons…

cs.AR2026

HGQ-LUT: Fast LUT-Aware Training and Efficient Architectures for DNN Inference

Chang Sun, Zhiqiang Que, Bakhtiar Zadeh +4

Lookup-table (LUT) based neural networks can deliver ultra-low latency and excellent hardware efficiency on FPGAs by mapping arithmetic operations directly onto the logic primitive…

cs.AR2026

da4ml: Distributed Arithmetic for Real-time Neural Networks on FPGAs

Chang Sun, Zhiqiang Que, Vladimir Loncar +2

Neural networks with a latency requirement on the order of microseconds, like the ones used at the CERN Large Hadron Collider, are typically deployed on FPGAs fully unrolled and pi…

cs.LG2026

JetFormer: A Scalable and Efficient Transformer for Jet Tagging from Offline Analysis to FPGA Triggers

Ruoqing Zheng, Chang Sun, Qibin Liu +7

We present JetFormer, a versatile and scalable encoder-only Transformer architecture for particle jet tagging at the Large Hadron Collider (LHC). Unlike prior approaches that are o…

physics.ins-det2025

Fast Jet Tagging with MLP-Mixers on FPGAs

Chang Sun, Jennifer Ngadiuba, Maurizio Pierini +1

We explore the innovative use of MLP-Mixer models for real-time jet tagging and establish their feasibility on resource-constrained hardware like FPGAs. MLP-Mixers excel in process…