24 citations · 71 across the 14 of their papers we have counts for
15 papers
Architectural improvements and technological enhancements for the APEnet+ interconnect system
R. Ammendola, A. Biagioni, O. Frezza +9
The APEnet+ board delivers a point-to-point, low-latency, 3D torus network interface card. In this paper we describe the latest generation of APEnet NIC, APEnet v5, integrated in a…
NaNet: a Low-Latency, Real-Time, Multi-Standard Network Interface Card with GPUDirect Features
A. Lonardo, F. Ameli, R. Ammendola +14
While the GPGPU paradigm is widely recognized as an effective approach to high performance computing, its adoption in low-latency, real-time systems is still in its early stages. A…
Applications of Many-Core Technologies to On-line Event Reconstruction in High Energy Physics Experiments
A. Gianelle, S. Amerio, D. Bastieri +10
Interest in many-core architectures applied to real time selections is growing in High Energy Physics (HEP) experiments. In this paper we describe performance measurements of many-…
NaNet:a low-latency NIC enabling GPU-based, real-time low level trigger systems
Roberto Ammendola, Andrea Biagioni, Riccardo Fantechi +13
We implemented the NaNet FPGA-based PCI2 Gen2 GbE/APElink NIC, featuring GPUDirect RDMA capabilities and UDP protocol management offloading. NaNet is able to receive a UDP input da…
Architectural improvements and 28 nm FPGA implementation of the APEnet+ 3D Torus network for hybrid HPC systems
Roberto Ammendola, Andrea Biagioni, Ottorino Frezza +7
Modern Graphics Processing Units (GPUs) are now considered accelerators for general purpose computation. A tight interaction between the GPU and the interconnection network is the…
Many-core applications to online track reconstruction in HEP experiments
S. Amerio, D. Bastieri, M. Corvo +10
Interest in parallel architectures applied to real time selections is growing in High Energy Physics (HEP) experiments. In this paper we describe performance measurements of Graphi…