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cs.AR2026
VeriInteresting: An Empirical Study of Model Prompt Interactions in Verilog Code Generation
Luca Collini, Andrew Hennesee, Patrick Yubeaton +2
Rapid advances in language models (LMs) have created new opportunities for automated code generation while complicating trade-offs between model characteristics and prompt design c…
cs.AR2025
C2HLSC: Leveraging Large Language Models to Bridge the Software-to-Hardware Design Gap
Luca Collini, Siddharth Garg, Ramesh Karri
High-Level Synthesis (HLS) tools offer rapid hardware design from C code, but their compatibility is limited by code constructs. This paper investigates Large Language Models (LLMs…
cs.AR2024
C2HLSC: Can LLMs Bridge the Software-to-Hardware Design Gap?
Luca Collini, Siddharth Garg, Ramesh Karri
High Level Synthesis (HLS) tools offer rapid hardware design from C code, but their compatibility is limited by code constructs. This paper investigates Large Language Models (LLMs…