59 citations · 321 across the 18 of their papers we have counts for
8 papers · 2 filters
Energy-band engineering for improved charge retention in fully self-aligned double floating-gate single-electron memories
Xiaohui Tang, Christophe Krzeminski, Aurélien Lecavelier des Etangs-Levallois +9
We present a new fully self-aligned single-electron memory with a single pair of nano floating gates, made of different materials (Si and Ge). The energy barrier that prevents stor…
Schottky barrier lowering with the formation of crystalline Er silicide on n-Si upon thermal annealing
Nicolas Reckinger, Xiaohui Tang Vincent Bayot, Dmitri A. Yarekha +8
The evolution of the Schottky barrier height (SBH) of Er silicide contacts to n-Si is investigated as a function of the annealing temperature. The SBH is found to drop substantiall…
Erbium Silicide Growth in the Presence of Residual Oxygen
Nicolas Reckinger, Xiaohui Tang, Sylvie Godey +6
The chemical changes of Ti/Er/n-Si(100) stacks evaporated in high vacuum and grown ex situ by rapid thermal annealing were scrutinized. The emphasis was laid on the evolution with…
Very low effective Schottky barrier height for erbium disilicide contacts on n-Si through arsenic segregation
Nicolas Reckinger, Claude Poleunis, Emmanuel Dubois +4
The segregation of As+ ions implanted into thin Er films deposited on n-Si substrates is studied after ErSi2-x formation. The same lowering of the effective Schottky barrier height…
Low temperature tunneling current enhancement in silicide/Si Schottky contacts with nanoscale barrier width
Nicolas Reckinger, Xiaohui Tang, Emmanuel Dubois +4
The low temperature electrical behavior of adjacent silicide/Si Schottky contacts with or without dopant segregation is investigated. The electrical characteristics are very well m…
Fabrication and Room-Temperature Single-Charging Behavior of Self-Aligned Single-Dot Memory Devices
Xiaohui Tang, Nicolas Reckinger, Vincent Bayot +4
Self-aligned single-dot memory devices and arrays were fabricated based on arsenic-assisted etching and oxidation effects. The resulting device has a floating gate of about 5-10 nm…
Optimisation and Simulation of an Alternative nano-flash Memory: the SASEM device
Christophe Krzeminski, Emmanuel Dubois, Xiaohui Tang +3
Process simulation are performed in order to simulate the full fabrication process of an alternative nano-flash memory in order to optimise it and to improve the understanding of t…
Process Optimization and Downscaling of a Single Electron Single Dot Memory
Christophe Krzeminski, Xiaohui Tang, Nicolas Reckinger +2
This paper presents the process optimization of a single-electron nanoflash electron memory. Self-aligned single dot memory structures have been fabricated using a wet anisotropic…