6 citations · 12 across the 3 of their papers we have counts for
4 papers
A New 22 nm ULPLS Architecture to Detect 70 mV Minimum Input, Suitable for IOT Applications
Jehan Taraporewalla, Dipankar Saha
Modern applications such as energy harvesting, signal monitoring in bio-medical sensing, portable point of care devices, etc. which involve state of the art mixed signal subsystems…
Row-Based Dual Vdd Assignment, for a Level Converter Free CSA Design and Its Near-Threshold Operation
Dipankar Saha, Aanan Chatterjee, Sayan Chatterjee +1
Subthreshold circuit designs are very much popular for some of the ultra low power applications, where the minimum energy consumption is the primary concern. But, due to the weak d…
Implementation of the Cluster Based Tunable Sleep Transistor Cell Power Gating Technique for a 4x4 Multiplier Circuit
Dipankar Saha, Subhramita Basak, Sagar Mukherjee +2
A modular, programmable, and high performance Power Gating strategy, called cluster based tunable sleep transistor cell Power Gating, has been introduced in the present paper with…
A Low-Voltage, Low-Power 4-bit BCD Adder, designed using the Clock Gated Power Gating, and the DVT Scheme
Dipankar Saha, Subhramita Basak, Sagar Mukherjee +1
This paper proposes a Low-Power, Energy Efficient 4-bit Binary Coded Decimal (BCD) adder design where the conventional 4-bit BCD adder has been modified with the Clock Gated Power…