2 papers
cs.LG2023
Verilog-to-PyG -- A Framework for Graph Learning and Augmentation on RTL Designs
Yingjie Li, Mingju Liu, Alan Mishchenko +1
The complexity of modern hardware designs necessitates advanced methodologies for optimizing and analyzing modern digital systems. In recent times, machine learning (ML) methodolog…
cs.AR2023
DAG-aware Synthesis Orchestration
Yingjie Li, Mingju Liu, Mark Ren +2
The key methodologies of modern logic synthesis techniques are conducted on multi-level technology-independent representations such as And-Inverter-Graphs (AIGs) of the digital log…