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physics.ins-det2026
PSEC6: an 8-Channel 40 GSa/s Waveform Sampling ASIC in TSMC 65nm with 10.24 GHz PLL
Ahan Datta, Andrew Arzac, Davide Braga +14
Picosecond level timing resolution is a prerequisite capability for improved coincidence matching, time-of-flight measurements, and secondary vertex reconstruction. Here, we presen…
physics.ins-det2026
A Sub-electron-noise Skipper-CCD Readout ASIC with Improved Channel-to-channel Isolation and an Integrated Cryogenic Voltage Reference
Fabricio Alcalde Bessia, Claudio Chavez, Troy England +6
The MIDNA application specific integrated circuits (ASICs) are a series of skipper-CCD readout chips fabricated in a 65 nm low-power CMOS process that implement a correlated double…
physics.ins-det2024
Design of an 8-Channel 40 GS/s 20 mW/Ch Waveform Sampling ASIC in 65 nm CMOS
Jinseo Park, Evan Angelico, Andrew Arzac +14
1 ps timing resolution is the entry point to signature based searches relying on secondary/tertiary vertices and particle identification. We describe a preliminary design for PSEC5…