5 citations · 5 across the 3 of their papers we have counts for
3 papers
Dynamically Reprogrammable Runtime Monitors for Bounded-time MTL
Chirantan Hebballi, Akash Poptani, Amrutha Benny +3
A Runtime Verification (RV) framework that supports online, at-speed verification of properties that can change dynamically (during in-field operations) will benefit a large variet…
Dynamic Ineffectuality-based Clustered Architectures
Rajshekar Kalayappan, Sandeep Chandran
The direction of conditional branches is predicted correctly in modern processors with great accuracy. We find several instructions in the dynamic instruction stream that contribut…
Tejas Simulator : Validation against Hardware
Smruti R. Sarangi, Rajshekar Kalayappan, Prathmesh Kallurkar +1
In this report we show results that validate the Tejas architectural simulator against native hardware. We report mean error rates of 11.45% and 18.77% for the SPEC2006 and Splash2…