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AME-PIM: Can Memory be Your Next Tensor Accelerator?
Emanuele Venieri, Simone Manoni, Alberto Florian +3
High Bandwidth Memory with Processing-in-Memory (HBM-PIM) offers an opportunity to reduce data movement by executing computation directly inside memory, but current commercial plat…
CVA6-CFI: A First Glance at RISC-V Control-Flow Integrity Extensions
Simone Manoni, Emanuele Parisi, Riccardo Tedeschi +3
This work presents the first design, integration, and evaluation of the standard RISC-V extensions for Control-Flow Integrity (CFI). The Zicfiss and Zicfilp extensions aim at prote…
SpikeStream: Accelerating Spiking Neural Network Inference on RISC-V Clusters with Sparse Computation Extensions
Simone Manoni, Paul Scheffler, Luca Zanatta +3
Spiking Neural Network (SNN) inference has a clear potential for high energy efficiency as computation is triggered by events. However, the inherent sparsity of events poses challe…
Efficient Trace for RISC-V: Design, Evaluation, and Integration in CVA6
Umberto Laghi, Simone Manoni, Emanuele Parisi +1
In this work, we present the design and evaluation of a Processor Tracing System compliant with the RISC-V Efficient Trace specification for Instruction Branch Tracing. We integrat…