3 papers
eess.SY2024
Optimized Cryo-CMOS Technology with VTH<0.2V and Ion>1.2mA/um for High-Peformance Computing
Chang He, Yue Xin, Longfei Yang +13
We report the design-technology co-optimization (DTCO) scheme to develop a 28-nm cryogenic CMOS (Cryo-CMOS) technology for high-performance computing (HPC). The precise adjustment…
cs.NE2024
Voltage-Controlled Magnetoelectric Devices for Neuromorphic Diffusion Process
Yang Cheng, Qingyuan Shu, Albert Lee +13
Stochastic diffusion processes are pervasive in nature, from the seemingly erratic Brownian motion to the complex interactions of synaptically-coupled spiking neurons. Recently, dr…
eess.SP2023
A Read Margin Enhancement Circuit with Dynamic Bias Optimization for MRAM
Renhe Chen, Albert Lee, Zirui Wang +2
This brief introduces a read bias circuit to improve readout yield of magnetic random access memories (MRAMs). A dynamic bias optimization (DBO) circuit is proposed to enable the r…