9 papers
CASS-RTL: Correctness-Aware Subspace Steering for RTL Generation with LLMs
Mohammad Akyash, Nowfel Mashnoor, Kimia Azar +1
Recent advances in large language models (LLMs) have enabled the automatic synthesis (generation) of register-transfer level (RTL) code from natural language instructions, offering…
MeltRTL: Multi-Expert LLMs with Inference-time Intervention for RTL Code Generation
Nowfel Mashnoor, Mohammad Akyash, Hadi Kamali +1
The automated generation of hardware register-transfer level (RTL) code with large language models (LLMs) shows promise, yet current solutions struggle to produce syntactically and…
CircuitGuard: Mitigating LLM Memorization in RTL Code Generation Against IP Leakage
Nowfel Mashnoor, Mohammad Akyash, Hadi Kamali +1
Large Language Models (LLMs) have achieved remarkable success in generative tasks, including register-transfer level (RTL) hardware synthesis. However, their tendency to memorize t…
SAGE-HLS: Syntax-Aware AST-Guided LLM for High-Level Synthesis Code Generation
M Zafir Sadik Khan, Nowfel Mashnoor, Mohammad Akyash +2
In today's rapidly evolving field of electronic design automation (EDA), the complexity of hardware designs is increasing, necessitating more sophisticated automation solutions. Hi…
TimelyHLS: LLM-Based Timing-Aware and Architecture-Specific FPGA HLS Optimization
Nowfel Mashnoor, Mohammad Akyash, Hadi Kamali +1
Achieving timing closure and design-specific optimizations in FPGA-targeted High-Level Synthesis (HLS) remains a significant challenge due to the complex interaction between archit…
DecoRTL: A Run-time Decoding Framework for RTL Code Generation with LLMs
Mohammad Akyash, Kimia Azar, Hadi Kamali
As one of their many applications, large language models (LLMs) have recently shown promise in automating register transfer level (RTL) code generation. However, conventional LLM d…