2 citations · 2 across the 2 of their papers we have counts for
2 papers
cs.AR2025
RealProbe: An Automated and Lightweight Performance Profiler for In-FPGA Execution of High-Level Synthesis Designs
Jiho Kim, Cong Hao
High-level synthesis (HLS) accelerates FPGA design by rapidly generating diverse implementations using optimization directives. However, even with cycle-accurate C/RTL co-simulatio…
cs.CL2024★ 2 cited
Understanding the Performance and Estimating the Cost of LLM Fine-Tuning
Yuchen Xia, Jiho Kim, Yuhan Chen +4
Due to the cost-prohibitive nature of training Large Language Models (LLMs), fine-tuning has emerged as an attractive alternative for specializing LLMs for specific tasks using lim…