6 citations · 6 across the 7 of their papers we have counts for
7 papers
Mixed-Precision Training and Compilation for RRAM-based Computing-in-Memory Accelerators
Rebecca Pelke, Joel Klein, Jose Cubero-Cascante +3
Computing-in-Memory (CIM) accelerators are a promising solution for accelerating Machine Learning (ML) workloads, as they perform Matrix-Vector Multiplications (MVMs) on crossbar a…
Optimizing Binary and Ternary Neural Network Inference on RRAM Crossbars using CIM-Explorer
Rebecca Pelke, José Cubero-Cascante, Nils Bosbach +5
Using Resistive Random Access Memory (RRAM) crossbars in Computing-in-Memory (CIM) architectures offers a promising solution to overcome the von Neumann bottleneck. Due to non-idea…
Evaluating the Scalability of Binary and Ternary CNN Workloads on RRAM-based Compute-in-Memory Accelerators
José Cubero-Cascante, Rebecca Pelke, Noah Flohr +3
The increasing computational demand of Convolutional Neural Networks (CNNs) necessitates energy-efficient acceleration strategies. Compute-in-Memory (CIM) architectures based on Re…
A Calibratable Model for Fast Energy Estimation of MVM Operations on RRAM Crossbars
José Cubero-Cascante, Arunkumar Vaidyanathan, Rebecca Pelke +3
The surge in AI usage demands innovative power reduction strategies. Novel Compute-in-Memory (CIM) architectures, leveraging advanced memory technologies, hold the potential for si…
A Fully Automated Platform for Evaluating ReRAM Crossbars
Rebecca Pelke, Felix Staudigl, Niklas Thomas +6
Resistive Random Access Memory (ReRAM) is a promising candidate for implementing Computing-in-Memory (CIM) architectures and neuromorphic circuits. ReRAM cells exhibit significant…
CLSA-CIM: A Cross-Layer Scheduling Approach for Computing-in-Memory Architectures
Rebecca Pelke, Jose Cubero-Cascante, Nils Bosbach +3
The demand for efficient machine learning (ML) accelerators is growing rapidly, driving the development of novel computing concepts such as resistive random access memory (RRAM)-ba…
parti-gem5: gem5's Timing Mode Parallelised
José Cubero-Cascante, Niko Zurstraßen, Jörn Nöller +2
Detailed timing models are indispensable tools for the design space exploration of Multiprocessor Systems on Chip (MPSoCs). As core counts continue to increase, the complexity in m…