2 citations · 2 across the 5 of their papers we have counts for
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cs.AR2026
From Characterization to Microarchitecture: Designing an Elegant and Reliable BFP-Based NPU
Jie Zhang, Jiapeng Guan, Hao Zhou +4
Block Floating-Point (BFP) is emerging as an attractive data format for edge Neural Processing Units (NPUs), combining wide dynamic range with high hardware efficiency. However, it…
cs.AR2026
Strix: Re-thinking NPU Reliability from a System Perspective
Jiapeng Guan, Jie Zhang, Hao Zhou +8
DNNs and LLMs increasingly rely on hardware accelerators, including in safety-critical domains, while technology scaling and growing model complexity make hardware faults more freq…
cs.AR2024★ 2 cited
NeoMem: Hardware/Software Co-Design for CXL-Native Memory Tiering
Zhe Zhou, Yiqi Chen, Tao Zhang +8
The Compute Express Link (CXL) interconnect makes it feasible to integrate diverse types of memory into servers via its byte-addressable SerDes links. Considering the various acces…