518 citations · 1k across the 15 of their papers we have counts for
Showing 2009Show all
2 papers · 1 filter
cs.PF2009★ 9 cited
Multi-core architectures: Complexities of performance prediction and the impact of cache topology
Jan Treibig, Georg Hager, Gerhard Wellein
The balance metric is a simple approach to estimate the performance of bandwidth-limited loop kernels. However, applying the method to in-cache situations and modern multi-core arc…
cs.PF2009★ 21 cited
Introducing a Performance Model for Bandwidth-Limited Loop Kernels
Jan Treibig, Georg Hager
We present a performance model for bandwidth limited loop kernels which is founded on the analysis of modern cache based microarchitectures. This model allows an accurate performan…