2 citations · 2 across the 1 of their papers we have counts for
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A Zero-overhead Flow for Security Closure
Mohammad Eslami, Ashira Johara, Kyungbin Park +1
In the traditional Application-Specific Integrated Circuit (ASIC) design flow, the concept of timing closure implies to reach convergence during physical synthesis such that, under…
SCARF: Securing Chips with a Robust Framework against Fabrication-time Hardware Trojans
Mohammad Eslami, Tara Ghasempouri, Samuel Pagliarini
The globalization of the semiconductor industry has introduced security challenges to Integrated Circuits (ICs), particularly those related to the threat of Hardware Trojans (HTs)…
SALSy: Security-Aware Layout Synthesis
Mohammad Eslami, Tiago Perez, Samuel Pagliarini
Integrated Circuits (ICs) are the target of diverse attacks during their lifetime. Fabrication-time attacks, such as the insertion of Hardware Trojans, can give an adversary access…