2 papers
cs.CR2025
A Zero-overhead Flow for Security Closure
Mohammad Eslami, Ashira Johara, Kyungbin Park +1
In the traditional Application-Specific Integrated Circuit (ASIC) design flow, the concept of timing closure implies to reach convergence during physical synthesis such that, under…
cs.CR2024
SCARF: Securing Chips with a Robust Framework against Fabrication-time Hardware Trojans
Mohammad Eslami, Tara Ghasempouri, Samuel Pagliarini
The globalization of the semiconductor industry has introduced security challenges to Integrated Circuits (ICs), particularly those related to the threat of Hardware Trojans (HTs)…