activity
20242026
most citedUniSparse: An Intermediate Language for General Sparse Format Customization

7 citations · 13 across the 10 of their papers we have counts for

collaborators

10 papers

cs.AI2026

Can Agents Design Better Chips with a Higher Level Abstraction?

Zijian Ding, Yang Zou, Yizhou Sun +1

Large Language Model (LLM) agents are increasingly being explored for chip design, but most existing approaches operate directly at RTL. We ask whether agents can design better chi…

cs.AI2026

AgRefactor: Self-Evolving Agentic Workflow for HLS Compatibility and Performance

Yang Zou, Zijian Ding, Yizhou Sun +1

High-Level Synthesis (HLS) provides a fast path from concepts to silicon, but converting real-world software into synthesizable HLS code remains challenging due to restrictive lang…

cs.LG2025

Iceberg: Enhancing HLS Modeling with Synthetic Data

Zijian Ding, Tung Nguyen, Weikai Li +3

Deep learning-based prediction models for High-Level Synthesis (HLS) of hardware designs often struggle to generalize. In this paper, we study how to close the generalizability gap…

cs.AR2025★ 1 cited

LLM-DSE: Searching Accelerator Parameters with LLM Agents

Hanyu Wang, Xinrui Wu, Zijian Ding +6

Even though high-level synthesis (HLS) tools mitigate the challenges of programming domain-specific accelerators (DSAs) by raising the abstraction level, optimizing hardware direct…

cs.LG2025

LIFT: LLM-Based Pragma Insertion for HLS via GNN Supervised Fine-Tuning

Neha Prakriya, Zijian Ding, Yizhou Sun +1

FPGAs are increasingly adopted in datacenter environments for their reconfigurability and energy efficiency. High-Level Synthesis (HLS) tools have eased FPGA programming by raising…

cs.LG2024★ 1 cited

Hierarchical Mixture of Experts: Generalizable Learning for High-Level Synthesis

Weikai Li, Ding Wang, Zijian Ding +4

High-level synthesis (HLS) is a widely used tool in designing Field Programmable Gate Array (FPGA). HLS enables FPGA design with software programming languages by compiling the sou…

cs.LG2024★ 4 cited

Learning to Compare Hardware Designs for High-Level Synthesis

Yunsheng Bai, Atefeh Sohrabizadeh, Zijian Ding +6

High-level synthesis (HLS) is an automated design process that transforms high-level code into hardware designs, enabling the rapid development of hardware accelerators. HLS relies…

cs.AR2024

Efficient Task Transfer for HLS DSE

Zijian Ding, Atefeh Sohrabizadeh, Weikai Li +3

There have been several recent works proposed to utilize model-based optimization methods to improve the productivity of using high-level synthesis (HLS) to design domain-specific…

cs.LG2024

Cross-Modality Program Representation Learning for Electronic Design Automation with High-Level Synthesis

Zongyue Qin, Yunsheng Bai, Atefeh Sohrabizadeh +4

In recent years, domain-specific accelerators (DSAs) have gained popularity for applications such as deep learning and autonomous driving. To facilitate DSA designs, programmers us…

cs.CL2024★ 7 cited

UniSparse: An Intermediate Language for General Sparse Format Customization

Jie Liu, Zhongyuan Zhao, Zijian Ding +3

The ongoing trend of hardware specialization has led to a growing use of custom data formats when processing sparse workloads, which are typically memory-bound. These formats facil…