1 citations · 1 across the 9 of their papers we have counts for
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Spec-Driven Hardware Evolution via Executable Contract Refinement and Proof-Guided RTL Update
Shibo Zhao, Yang Zhang, Mengxia Tao +6
Hardware development is inherently evolutionary: major revisions typically begin by changing intended behavior and then updating a previously validated implementation, rather than…
Arisca: A Parameterized Symbolic Algebra Framework for Arithmetic Circuit Verification
Kezhi Li, Min Li, Qiang Xu
Formal verification of highly optimized arithmetic circuits at the gate-level remains a significant challenge due to the state space explosion problem. Although Symbolic Computer A…
Miter-Aware LUT Mapping: Aligning Structure and Solvability for Efficient Logic Equivalence Checking
Jiaying Zhu, Zhengyuan Shi, Mengxia Tao +3
Logic Equivalence Checking (LEC), a fundamental hardware verification task, is often bottlenecked by synthesis-induced structural perturbations and XOR-dense regions that degrade S…
EquivFusion: Unifying Hardware Equivalence Checking from Algorithms to Netlists via MLIR
Jiaying Zhu, Baoqi Zhang, Mengxia Tao +4
Ensuring functional consistency between high-level algorithmic models and low-level hardware implementations is a critical challenge, particularly as modern design flows increasing…