2 papers
cs.AI2026
GoGoTB: Agentic RTL Verification with Specification-Grounded Coverage Closure
Xin Xin, Jincheng Lou, Junhui Li +11
Functional verification dominates integrated circuit (IC) front-end engineering effort, and a single missed bug that escapes to silicon can trigger a costly respin. Recent large la…
cs.LG2025
MMCircuitEval: A Comprehensive Multimodal Circuit-Focused Benchmark for Evaluating LLMs
Chenchen Zhao, Zhengyuan Shi, Xiangyu Wen +19
The emergence of multimodal large language models (MLLMs) presents promising opportunities for automation and enhancement in Electronic Design Automation (EDA). However, comprehens…