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20242026
most citedGraphitron: A Domain Specific Language for FPGA-based Graph Processing Accelerator Generation

1 citations · 4 across the 11 of their papers we have counts for

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9 papers · 1 filter

cs.AR2026

VeriPilot: An LLM-Powered Verilog Debugging Framework

Yihan Wang, Cheng Liu, Jiazheng Zhang +4

Verilog debugging remains one of the most time-consuming stages in digital circuit design. Recent advances in Large Language Models (LLMs) have enabled automated debugging; however…

cs.AR2026

FT-Pilot: Automated Fault-Tolerant RTL Rewriting via Vulnerability-Guided LLMs

Weixing Liu, Zizhen Liu, Jing Ye +4

As integrated circuit technologies continue to scale toward advanced process nodes, the continual reduction in node capacitance and supply voltage has made digital systems increasi…

cs.AR2025★ 1 cited

Understanding and Mitigating Errors of LLM-Generated RTL Code

Jiazheng Zhang, Cheng Liu, Long Cheng +2

Despite limited success in large language model (LLM)-based register-transfer-level (RTL) code generation, the root causes of errors remain poorly understood. To address this, we c…

cs.AR2024★ 1 cited

IICPilot: An Intelligent Integrated Circuit Backend Design Framework Using Open EDA

Zesong Jiang, Qing Zhang, Cheng Liu +3

Open-source EDA tools are rapidly advancing, fostering collaboration, innovation, and knowledge sharing within the EDA community. However, the growing complexity of these tools, ch…

cs.AR2024★ 1 cited

HLSPilot: LLM-based High-Level Synthesis

Chenwei Xiong, Cheng Liu, Huawei Li +1

Large language models (LLMs) have catalyzed an upsurge in automatic code generation, garnering significant attention for register transfer level (RTL) code generation. Despite the…

cs.AR2024

MCU-MixQ: A HW/SW Co-optimized Mixed-precision Neural Network Design Framework for MCUs

Junfeng Gong, Cheng Liu, Long Cheng +2

Mixed-precision neural network (MPNN) that utilizes just enough data width for the neural network processing is an effective approach to meet the stringent resources constraints in…

cs.AR2024★ 1 cited

Graphitron: A Domain Specific Language for FPGA-based Graph Processing Accelerator Generation

Xinmiao Zhang, Zheng Feng, Shengwen Liang +4

FPGA-based graph processing accelerators, enabling extensive customization, have demonstrated significant energy efficiency over general computing engines like CPUs and GPUs. Nonet…

cs.AR2024

SigDLA: A Deep Learning Accelerator Extension for Signal Processing

Fangfa Fu, Wenyu Zhang, Zesong Jiang +8

Deep learning and signal processing are closely correlated in many IoT scenarios such as anomaly detection to empower intelligence of things. Many IoT processors utilize digital si…

cs.AR2024

ApproxPilot: A GNN-based Accelerator Approximation Framework

Qing Zhang, Cheng Liu, Siting Liu +3

A typical optimization of customized accelerators for error-tolerant applications such as multimedia, recognition, and classification is to replace traditional arithmetic units lik…