3 papers
eess.SP2025
PPAAS: PVT and Pareto Aware Analog Sizing via Goal-conditioned Reinforcement Learning
Seunggeun Kim, Ziyi Wang, Sungyoung Lee +4
Device sizing is a critical yet challenging step in analog and mixed-signal circuit design, requiring careful optimization to meet diverse performance specifications. This challeng…
cs.LG2025
DICE: Device-level Integrated Circuits Encoder with Graph Contrastive Pretraining
Sungyoung Lee, Ziyi Wang, Seunggeun Kim +3
Pretraining models with unsupervised graph representation learning has led to significant advancements in domains such as social network analysis, molecular design, and electronic…
cs.LG2024
M3: Mamba-assisted Multi-Circuit Optimization via MBRL with Effective Scheduling
Youngmin Oh, Jinje Park, Seunggeun Kim +3
Recent advancements in reinforcement learning (RL) for analog circuit optimization have demonstrated significant potential for improving sample efficiency and generalization across…