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cs.AR2025
Hardware-Aware Data and Instruction Mapping for AI Tasks: Balancing Parallelism, I/O and Memory Tradeoffs
Md Rownak Hossain Chowdhury, Mostafizur Rahman
We introduce a mapping framework for deep learning inference that takes advantage of predictable neural network behavior to plan both computation and communication ahead of time. T…
cs.AR2025
Demystifying the 7-D Convolution Loop Nest for Data and Instruction Streaming in Reconfigurable AI Accelerators
Md Rownak Hossain Chowdhury, Mostafizur Rahman
Convolution remains the most compute-intensive operation in AI acceleration, often constituting over 80-90% of the workload. Existing approaches in spatial architectures such as co…
cs.AR2025
Accelerating PageRank Algorithmic Tasks with a new Programmable Hardware Architecture
Md Rownak Hossain Chowdhury, Mostafizur Rahman
Addressing the growing demands of artificial intelligence (AI) and data analytics requires new computing approaches. In this paper, we propose a reconfigurable hardware accelerator…