38 citations · 70 across the 12 of their papers we have counts for
13 papers
Crosstalk Noise based Configurable Computing: A New Paradigm for Digital Electronics
Naveen Kumar Macha, Md Arif Iqbal, Bhavana Tejaswini Repalle +2
The past few decades have seen exponential growth in capabilities of digital electronics primarily due to the ability to scale Integrated Circuits (ICs) to smaller dimensions while…
A Logic Simplification Approach for Very Large Scale Crosstalk Circuit Designs
Md Arif Iqbal, Naveen Kumar Macha, Bhavana Tejaswini Repalle +1
Crosstalk computing, involving engineered interference between nanoscale metal lines, offers a fresh perspective to scaling through co-existence with CMOS. Through capacitive manip…
A New Paradigm for Fault-Tolerant Computing with Interconnect Crosstalks
Naveen Kumar Macha, Bhavana Tejaswini Repalle, Sandeep Geedipally +2
The CMOS integrated chips at advanced technology nodes are becoming more vulnerable to various sources of faults like manufacturing imprecisions, variations, aging, etc. Additional…
Crosstalk based Fine-Grained Reconfiguration Techniques for Polymorphic Circuits
Naveen Kumar Macha, Sandeep Geedipally, Bhavana Repalle +3
Truly polymorphic circuits, whose functionality/circuit behavior can be altered using a control variable, can provide tremendous benefits in multi-functional system design and reso…
Thermal Management in Fine-Grained 3-D Integrated Circuits
Md Arif Iqbal, Naveen Kumar Macha, Wafi Danesh +2
For beyond 2-D CMOS logic, various 3-D integration approaches specially transistor based 3-D integrations such as monolithic 3-D [1], Skybridge [2], SN3D [3] holds most promise. Ho…
Cost Modeling and Projection for Stacked Nanowire Fabric
Naveen Kumar Macha, Mostafizur Rahman
To continue scaling beyond 2-D CMOS with 3-D integration, any new 3-D IC technology has to be comparable or better than 2-D CMOS in terms of scalability, enhanced functionality, de…
Routability in 3D IC Design: Monolithic 3D vs. Skybridge 3D CMOS
Jiajun Shi, Mingyu Li, Santosh Khasanvis +2
Conventional 2D CMOS technology is reaching fundamental scaling limits, and interconnect bottleneck is dominating integrated circuit (IC) power and performance. While 3D IC technol…
Skybridge-3D-CMOS: A Vertically-Composed Fine-Grained 3D CMOS Integrated Circuit Technology
Mingyu Li, Jiajun Shi, Mostafizur Rahman +3
Parallel and monolithic 3D integration directions offer pathways to realize 3D integrated circuits (ICs) but still lead to layer-by-layer implementations, each functional layer bei…
Manufacturing Pathway and Experimental Demonstration for Nanoscale Fine-Grained 3-D Integrated Circuit Fabric
Mostafizur Rahman, Jiajun Shi, Mingyu Li +2
At sub-20nm technologies CMOS scaling faces severe challenges primarily due to fundamental device scaling limitations, interconnection overhead and complex manufacturing. Migration…
Self-similar Magneto-electric Nanocircuit Technology for Probabilistic Inference Engines
Santosh Khasanvis, Mingyu Li, Mostafizur Rahman +5
Probabilistic graphical models are powerful mathematical formalisms for machine learning and reasoning under uncertainty that are widely used for cognitive computing. However they…
Nanowire Volatile RAM as an Alternative to SRAM
Mostafizur Rahman, Santosh Khasanvis, Csaba Andras Moritz
Maintaining benefits of CMOS technology scaling is becoming challenging due to increased manufacturing complexities and unwanted passive power dissipations. This is particularly ch…
Skybridge: 3-D Integrated Circuit Technology Alternative to CMOS
Mostafizur Rahman, Santosh Khasanvis, Jiajun Shi +2
Continuous scaling of CMOS has been the major catalyst in miniaturization of integrated circuits (ICs) and crucial for global socio-economic progress. However, scaling to sub-20nm…
Metal-Gated Junctionless Nanowire Transistors
Mostafizur Rahman, Pritish Narayanan, Csaba Andras Moritz
Junctionless Nanowire Field-Effect Transistors (JNFETs), where the channel region is uniformly doped without the need for source-channel and drain-channel junctions or lateral dopi…